Product Details
| SN54S373J Overview It is a type of FPGA belonging to the * series. SN54S373J Features * series SN54S373J Applications SN54S373J Flip Flops applications. Digital electronics systems Computers Communications Counters Frequency Dividers Shift Registers Storage Registers Bounce elimination switch Data storage Data transfer |
Product Description
| Type# | Description |
| ANSC PART# | ANSC - SN54S373J |
| Part Package Code | DIP |
| Package Description | Dip, Dip20,.3 |
| Pin Count | 20 |
| Additional Feature | Lg_max |
| Control Type | Enable Low |
| Count Direction | Unidirectional |
| Family | S |
| JESD-30 Code | R-GDIP-T20 |
| JESD-609 Code | e0 |
| Length | 24.195 Mm |
| Load Capacitance (CL) | 15 Pf |
| Logic IC Type | Bus Driver |
| Max I(ol) | 0.02 A |
| Number of Bits | 8 |
| Number of Functions | 8 |
| Number of Ports | 2 |
| Number of Terminals | 20 |
| Operating Temperature-Max | 125 °C |
| Operating Temperature-Min | -55 °C |
| Output Characteristics | 3-State |
| Output Polarity | TRUE |
| Package Body Material | Ceramic, Glass-Sealed |
| Package Code | DIP |
| Package Equivalence Code | DIP20,.3 |
| Package Shape | Rectangular |
| Package Style | In-Line |
| Packing Method | Tube |
| Power Supply Current-Max (ICC) | 40 Ma |
| Prop. Delay@Nom-Sup | 18 Ns |
| Propagation Delay (tpd) | 30 Ns |
| Qualification Status | Not Qualified |
| Schmitt Trigger | No |
| Seated Height-Max | 5.08 Mm |
| Supply Voltage-Max (Vsup) | 5.25 V |
| Supply Voltage-Min (Vsup) | 4.75 V |
| Supply Voltage-Nom (Vsup) | 5 V |
| Surface Mount | No |
| Technology | Ttl |
| Temperature Grade | Military |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Terminal Form | Through-Hole |
| Terminal Pitch | 2.54 Mm |
| Terminal Position | Dual |
| Trigger Type | Positive Edge |
| Width | 7.62 Mm |
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